Elbrus 2c

Introduction

Elbrus-2C+ is a high performance hybrid microprocessor. It contains 2 Elbrus 2000 CPU cores and 4 ELVEES digital signal processor (DSP) cores. The main application for the Elbrus-2C+ microprocessor is digital signal processing, such as radar and image analysis. The microprocessor also has 3 channels for inter-processor communications in a multiprocessor system.

e2c.jpg

Elbrus compilers provides code generation for the DSP cores which ensures effective communication between the main program running on the CPU cores and procedures for the DSP.

Highlights

Process 90 nm
Clock frequency 500 MHz
Number of Elbrus 2000 cores 2
Number of DSP (Elcore-09) cores 4
Peak performance (CPU + core core DSP) 64 bits, Gflops 8
Peak performance (CPU + core core DSP) 32 bits, GIPS 44
Peak performance (CPU + core core DSP) 32 bits, Gflops 28
Instruction cache commands (per core), kB 64
Data cache (per core), kB 64
Second level cache (per core), MB 1
DSP cache (per core DSP), kB 128
Bus bandwidth to cache memory, GB/s 16
Bus bandwidth to the RAM (two channels), GB/s 12.8
Number of Channels for interprocessor exchange 3
Channel bandwidth interprocessor exchange, GB/s 4
Number of I/O channels 2
Capacity of the I/O channel, GB/s 2
Chip area, mm2 289
Number of transistors 368 million
Number of connection layers 9
Enclosure Type / number of pins HFCBGA 1296
Case dimensions 37.5 x 37, 5 mm
Supply voltage 1,0 / 1,8 / 2,5 V
Average power dissipation ~25 W

Architecture

Architectural overview of the Elbrus-2C+ microprocessor:
e2c_shema.jpg

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